In the Linux kernel, the following vulnerability has been resolved:
drm/xe/uapi: Reject coh_none PAT index for CPU cached memory in madvise
Add validation in xe_vm_madvise_ioctl() to reject PAT indices with XE_COH_NONE coherency mode when applied to CPU cached memory.
Using coh_none with CPU cached buffers is a security issue. When the kernel clears pages before reallocation, the clear operation stays in CPU cache (dirty). GPU with coh_none can bypass CPU caches and read stale sensitive data directly from DRAM, potentially leaking data from previously freed pages of other processes.
This aligns with the existing validation in vm_bind path (xe_vm_bind_ioctl_validate_bo).
v2(Matthew brost)
v3(Matthew Auld)
v4(Shuicheng Lin)
v5
v6
v7
v8
v9
v10
(cherry picked from commit 016ccdb674b8c899940b3944952c96a6a490d10a)
Exploitability
AV:LAC:HPR:LUI:NScope
S:UImpact
C:HI:HA:H7/CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:U/C:H/I:H/A:H